Error correcting codes (ECC) in disk drives have traditionally use fixed length codewords that include a fixed length set of data bits and a set of ECC bits that are mathematically derived from the set of data bits. Conventionally each sector on a track in a disk drive was designed as an ECC codeword. However, interleaving of codewords and multilevel codes have been described. See, for example, U.S. Pat. No. 4,525,838 to Patel (Jun. 25, 1985) which describes a multibyte error correcting system which employs a two-level code structure consisting of subblocks within a block. Each subblock includes two or more interleaved primary codewords.
One linear error correcting code (ECC) that can be used in disk drives is a low-density parity-check (LDPC) code. LDPC codes are also referred to as Gallager codes. Even though the term ECC literally implies that errors can be corrected, in practice the term is used loosely to include systems that only provide error detection. So an LDPC implementation in a disk drive may not include any ability to correct errors.
In US published patent application 20120159285 (Jun. 21, 2012), Ravi Motwani describes storage drives with LDPC encoded data in which an errantly read memory unit (e.g., faulty LDPC codeword) may be recovered. NAND flash storage drives memory modules (e.g., dies) are written with LDPC codewords. improved UBER (unrecoverable bit error rate) performance may be attained. N separate dies are provided for the storage drive memory. Motwani has also described a concept wherein the LDPC codewords are spread across dies. The raw bit error rate (RBER) tolerance is said to improve as number of dies in the spread increases. A drawback is that the read/access time increases. See
Mustafa Eroz, et al. have described a method for providing short block length low density parity check (LDPC) codes. (US published patent application 20050060635, Mar. 17, 2005.) An LDPC encoder generates a short LDPC code by shortening longer mother codes. The short LDPC code has an outer Bose Chaudhuri Hocquenghem (BCH) code. For an LDPC code with code rate of 3/5 utilizing 8-PSK (Phase Shift Keying) modulation, an interleaver provides for interleaving bits of the output LDPC code by serially writing data associated with the LDPC code column-wise into a table and reading the data row-wise from right to left.
In US published patent application 20070245214 (Oct. 18, 2007) Aditya Ramamoorthy described multi-level signal memory cells with LDPC and interleaving. A low density parity check (LDPC) coder is used with an interleaver adapted to apply bit interleaved code modulation (BICM) to the LDPC coded data values to generate BICM coded data values.
Zongwang Li, et al. have described a multi-tier LDPC encoding/decoding system with interleaving on a single track of a disk drive in US published patent application 20110264980, Oct. 27, 2011. An interleaver circuit interleaves the output of a first channel detector and separately interleaves the output of a second channel detector using two ping pong buffers.
Marwan H. Azmi, et al. have discussed the problem of finding the optimum degree distribution for the distributed LDPC codes in two-way relay channels. In a framework of multi-edge type (MET) LDPC codes, their methodology asymptotically optimizes the code's ensemble when different segments within the distributed codeword have been transmitted through different channels and experience different signal-to-noise ratios (SNRs). An average noise threshold is formulated to compute the convergence threshold of the distributed LDPC codes under density evolution and acts as the performance gap between the optimized distributed codes and the theoretical limit. See “Design of Distributed Multi-Edge Type LDPC Codes for Two-Way Relay Channels,” Marwan H. Azmi, Jun Li, Jinhong Yuan and Robert Malaney; 978-1-61284-233-2/11 2011 IEEE.
A problem addressed by embodiments of the present invention is the capacity degradation caused by signal-to-noise ratio (SNR) variation around a disk track and across the track. The SNR variation around a track is due to various factors including track misregistration (TMR), media variation, fly height variations during reading and writing operations, etc. Using the prior art, the capacity limit around a track is limited by approximately the worst case SNR at any point around a track. An object of embodiments of the invention is to improve the capacity around a track to the limit set by the average SNR around a track.